The Fluke 9010a Club

Next is the code for the 8085 Test Fixture and a pdf attached with color coding for ease of reading. Three down 2 to go.

I have left out all the general description and referred to the Z80 Code. I have included comments about features specific to the 8085.

Code:
;Fluke 8085 Pod Test Fixture EPROM Code 641421 V1.1
;
;Refer to Z80 Test Fixture EPROM Code for more general information
;
;All control lines are tied inactive through either pullup or pulldown resistors as needed
;
;There is a resistive voltage divider and switch to simulate a powerfail using the fixture.
;
;EPROM is accessed when A11 Low and /RD
;/INTA enables latch tied to 0D7H on the data bus.  0D7H is a Rst 2 instruction, which goes to Address 10H
;Empty EPROM locations are filled with 0FFH, a Rst 7 instruction (Address 38H).
;
;The address lines exercised by each test are as follows:
;       A15 A14 A13 A12  A11 A10 A9 A8  A7 A6 A5 A4  A3 A2 A1 A0
;Reset                       A10,       A7 ----- to --------- A0
;Int                A12,         A9,       A6 -- to --------- A0
;Trap                    A11,    A9,    A7 ----- to --------- A0
;Rst5.5         A13,             A9,A8,    A6 -- to --------- A0
;Rst6.5     A14,                 A9 ------------ to --------- A0
;Rst7.5 A15,                 A10,          A6 -- to --------- A0

        .ORG 0000H    ;Interrupt vector for Reset routine
Reset0: JMP Reset1

        .ORG 0010H    ;Interrupt vector for Rst 2 routine
Int0:   JMP Int1

        .ORG 0024H    ;Interrupt vector for Trap routine
Trap0:  JMP Trap1

        .ORG 002CH    ;Interrupt vector for Rst 5.5 routine
Rst550: JMP Rst551

        .ORG 0034H    ;Interrupt vector for Rst 6.5 routine
Rst650: JMP Rst651

        .ORG 003CH    ;Interrupt vector for Rst 7.5 routine
Rst750: JMP Rst751

        .ORG 00BFH    ;Reset, toggle A10 and A7-A0
;Reset routine executed after Pod Resets or RUN UUT start address
;Routine will run through program code and jumps to stay in Reset2 loop after reset, until an interrupt.
Reset1: MVI A,18H     ;No Sout, Reset Rst7.5 F/F, Rst Mask Set, Rst7.5&6.5&5.5
        SIM           ;Set Interrupt Mask
Reset2: EI            ;Enable Interrupts
        STA 0001H     ;Write 0001H to toggle A1. Writes 18H then float value to toggle data lines
        LDA 0400H     ;Read 400H to toggle A10. Reads floating data bus
        JMP Reset2

        .ORG 023FH    ;Int, toggle A12,A9 and A6-A0
Int1:   STA 0002H     ;Write 0001H to toggle A1. Writes float value to toggle data lines
        LDA 1000H     ;Read 1000H to toggle A12. Reads floating data bus
        EI            ;Enable Interrupts
        JMP Int1

        .ORG 02BEH    ;Trap, toggle A11,A9 and A7-A0
Trap1:  STA 0004H     ;Write 0004H to toggle A3. Writes float value to toggle data lines
        LDA 0800H     ;Read 800H to toggle A11. Reads floating data bus
        EI            ;Enable Interrupts
        JMP Trap1

        .ORG 033DH    ;Rst 5.5, toggle A13,A9,A8 and A6-A0
Rst551: STA 0008H     ;Write 0001H to toggle A1. Writes float value to toggle data lines
        LDA 2000H     ;Read 2000H to toggle A13. Reads floating data bus
        EI            ;Enable Interrupts
        JMP Rst551

        .ORG 03BCH    ;Rst 6.5, toggle A14 and A9-A0
Rst651: STA 0010H     ;Write 0001H to toggle A1. Writes float value to toggle data lines
        LDA 4000H     ;Read 4000H to toggle A14. Reads floating data bus
        EI            ;Enable Interrupts
        JMP Rst651

        .ORG 043FH    ;Rst 7.5, toggle A15,A10 and A6-A0, toggle SOD if connected to SID
                      ;Error in code does not execute toggle on A15
Rst751: DI            ;Disable interrupts

Rst753: MVI A,48H     ;Sout 0,leave Rst7.5 f/f,Mask Enable Rst7.5&6.5&5.5
        SIM           ;Set Interrupt Mask and serial out bit low
        RIM           ;Read Interrupt Mask to get serial in bit
        ANI 80H       ;Keep serial in bit
        CPI 00H       ;Compare to low bit
        JZ Rst752     ;Jump if it is low, to toggle serial bit
        JMP Rst753

Rst752: MVI A,0C8H    ;Sout 1,Leave Rst7.5 f/f, Mask enable Rst7.5&6.5&5.5
        SIM           ;Set Interrupt Mask and serial out bit high
        RIM           ;Read Interrupt Mask to get serial in bit
        ANI 80H       ;Keep serial in bit
        CPI 80H       ;Compare to high bit
        JZ Rst754     ;Jump if it is high
        JMP Rst752

;Rst754: There is an error in the code above, it does not ever get here, Rst754 should be here
        STA 0020H     ;Write 0001H to toggle A1. Writes last A to toggle data lines
        LDA 8000H     ;Read 8000H to toggle A15. Reads floating data bus

Rst754: EI            ;Enable Interrupts
        JMP Rst751
        .END
 

Attachments

  • 642421 V1.1 8085.pdf
    52.4 KB · Views: 0
Here is the 6502 and 6800 Test Fixture Code. Should be Ok, 6502 section assembles and matches the binary. Could be typos is 6800, I hand disassembled it, using 6800 mnemonics. I have included both in this post since they are the same fixture and combine to make up one EPROM.

That is all 5 done that have paperwork. @JRR, thank you for sharing the EPROM images and other fixture info. I will do the last file labelled 544841_V1.0 for the 6802. Do you have the paperwork for it you could post?

Code:
;Fluke 6502 Pod Test Fixture EPROM Code 653063 V1.0
;
;Refer to Z80 Test Fixture EPROM Code for more general information
;
;All control lines are tied inactive through either pullup or pulldown resistors as needed
;
;There is a resistive voltage divider and switch to simulate a powerfail using the fixture.
;
;Empty EPROM locations are filled with 0FFH
;
;S2 6502 mode ties EPROM A10 high. Inverted R/W and inverted A11 high used to enable EPROM
;
;The first half of the EPROM 800H-BFFH is not listed here, it contains the 6800 Test Fixture Code
;The two parts 800H-BFFH for the 6800 and C00H-FFFH for the 6502 are combined into one EPROM.
;
;The address lines exercised by each test are as follows:
;       A15 A14 A13 A12  A11 A10 A9 A8  A7 A6 A5 A4  A3 A2 A1 A0
;Reset              A12, A11,A10,                    A3  to - A0
;IRQ        A14,         A11,A10,       A7,   A5,    A3  to - A0
;NMI    A15,             A11,A10,       A7 to A5,    A3  to - A0

        .ORG 0C00H   ;Reset routine, toggle A12-A10,A3-A0
                     ;Typo in manual lists it as 800H
Reset0: LDX #$FF     ;Toggle data bits
        TXS
Reset1: LDA $1000    ;Toggle A12
        CLI          ;Enable Interrupts
        JMP Reset1

        .ORG 0CA0H   ;IRQ routine, toggle A14,A11,A10,A7,A5,A3-A0
IRQ0:  LDX #$FF      ;Toggle data bits
        TXS
IRQ1:   LDA $4000    ;Toggle A14
        SEI          ;Disable Interrupts
        JMP IRQ1

        .ORG 0CE0H   ;NMI routine, toggle A15,A11,A7-A5,A3-A0
NMI0:   LDX #$FF     ;Toggle data bits
        TXS
NMI1:   LDA $8000    ;Toggle A15
        CLI          ;Enable Interrupts
        JMP NMI1

        .ORG 0FFAH   ;6502 Vector Table
NMI:    DW    NMI0   ;0CE0
Reset:  DW    Reset0 ;0C00
IRQ:    DW    IRQ0   ;0CA0
        .END

Code:
;Fluke 6800 Pod Test Fixture EPROM Code 653063 V1.0
;
;Refer to Z80 Test Fixture EPROM Code for more general information
;
;All control lines are tied inactive through either pullup or pulldown resistors as needed
;
;There is a resistive voltage divider and switch to simulate a powerfail using the fixture.
;
;Empty EPROM locations are filled with 0FFH
;
;S2 6800 mode ties EPROM A10 low. Inverted R/W and inverted A11 high used to enable EPROM
;
;The second half of the EPROM C00H-FFFH is not listed here, it contains the 6502 Test Fixture Code
;The two parts 800H-BFFH for the 6800 and C00H-FFFH for the 6502 are combined into one EPROM.
;
;The address lines exercised by each test are as follows:
;       A15 A14 A13 A12  A11 A10 A9 A8  A7 A6 A5 A4  A3 A2 A1 A0
;Reset              A12, A11,                        A3  to - A0
;IRQ        A14,         A11,           A7,A6,          A2 to A0
;NMI    A15,             A11,           A7 to A5,    A3  to - A0

        .ORG 0800H   ;Reset routine, toggle A12,A11,A3-A0
Reset0: LDS $F000    ;Reset SP, toggles data lines
Reset1: LDA $1000    ;Toggle A12
        CLI          ;Enable Interrupts
        BRA Reset1

        .ORG 08A0H   ;Software Interrupt, not used
SINT0:  CLI          ;Enable Interrupts
        WAI          ;Wait for an Interrupt

        .ORG 08C0H   ;IRQ routine, toggle A14,A11,A2-A0
IRQ0:   LDS $F000    ;Reset SP, toggles data lines
IRQ1:   LDA $4000    ;Toggle A14
        BRA IRQ1

        .ORG 08E0H   ;NMI routine, toggle A15,A11,A7-A5,A3-A0
NMI0:   LDS $F000    ;Reset SP, toggles data lines
NMI1:   LDA $8000    ;Toggle A15
        CLI          ;Enable Interrupts
        BRA NMI1

        .ORG 0BF8H   ;6800 Vector Table
IRQ:    DW    IRQ0   ;08C0
SINT:   DW    SINT0  ;08A0
NMI:    DW    NMI0   ;08E0
Reset:  DW    Reset0 ;0800
        .END
 

Attachments

  • 653063 V1.0 6502.pdf
    49.3 KB · Views: 0
  • 653063 V1.0 6800.pdf
    48.9 KB · Views: 0
Here is the 6802 Test Fixture code. Based mostly on DasmX mnemonics. I also changed the 6800 code a little to be more correct as per DasmX mnemonics, updated pdf attached.

The 6802 code does tests for on chip RAM, this makes the code for it slightly longer. Code and colored pdf attached.

Hopefully these files might be useful, at least as a starting point, if anyone wants to try and understand or make mods to the original firmware for these test fixtures. I will make up a set of pcbs for them (budget models) to test. If they work I will share the files. They could come in very handy for anyone having trouble with buidling and testing their Pods.

Code:
;Fluke 6802 Pod Test Fixture EPROM Code 544841 V1.0
;
;Refer to Z80 Test Fixture EPROM Code for more general information
;
;All control lines are tied inactive through either pullup or pulldown resistors as needed
;
;There are two resistive voltage dividers and switches to simulate a Vcc or VBat powerfail using the fixture.
;
;Empty EPROM locations are filled with 0FFH
;
;Inverted R/W and inverted A11 high used to enable EPROM
;
;Comments based on EPROM code, 6802 info and picture of 6802 Test Fixture PCB.
;
;Mnemonics from DasmX. I used $xxxx for immediate hex word instead of Xxxxx
;
;Each test will also try to test the on chip RAM
;
;The address lines exercised by each test are as follows:
;       A15 A14 A13 A12  A11 A10 A9 A8  A7 A6 A5 A4  A3 A2 A1 A0
;Reset              A12, A11,           A7,      A4 --- to -- A0
;SINT           A13,     A11,    A9,    A7 ------    -- to -- A0
;IRQ        A14,         A11,A10,                A4 --- to -- A0
;NMI    A15,             A11 to- A9,             A4 --- to -- A0

        .ORG 0800H    ;Reset routine, toggle A12,A11,A7,A4-A0
Reset0: LDS #$F000    ;Reset SP, toggles data lines
Reset1: LDAA $1000    ;Toggle A12
        CLI           ;Enable Interrupts
        LDX #$0020    ;Load index register
        CLRA          ;Clear A register
        STAA $00,X    ;Store A register at (X+0)
        CMPA $00,X    ;Check if A matches at (X+0)
        BNE Reset1    ;Branch if no match
        JMP SINT0     ;Jump to SINT, do more RAM checking

        .ORG 0A00H    ;Software Interrupt, toggle A13,A11,A9,A7-A0
        ;Test all RAM locations $00-$7F can store $00, $AA and $55
SINT0:  SEI           ;Disable Interrupts
        LDX #$0000    ;Load index register
        CLRB          ;Clear B register

        ;Test if RAM can store 0 at index register address
SINT2:  LDAA $2000    ;Toggle A13
        CLI           ;Enable Interrupts
        CLRA          ;Clear A register
        STAA $00,X    ;Store A at (X+0)
        CMPA,$00,X    ;Check if A matches at (X+0)
        BNE SINT1     ;Branch if no match

        ;Test if RAM can store $AA at index register address
        LDAA #$AA     ;Load #$AA, alternating 1's
        STAA $00,X    ;Store A at (X+0)
        CMPA $00,X    ;Check if A matches at (X+0)
        BNE SINT1     ;Branch if no match

        ;Test if RAM can store $55 at index register address
        COMA          ;Complement A, opposite 1's
        STAA $00,X    ;Store A at (X+0)
        CMPA $00,X    ;Check if A matches at (X+0)
        BNE SINT1     ;Branch if no match

        ;Move onto next byte in RAM
        INX           ;Increment Index to next location
        INCB          ;Increment B register counter
        BPL SINT2     ;Jump if in RAM Range $00-$7F
        BRA SINT0     ;All RAM locations tested ok, do it again
        
        ;RAM errored, Stop and wait for an interrupt if we get here
SINT1:  STAB $0000    ;Store current locations passed counter
        LDS #$F000    ;Reset SP, toggles data lines
        CLI           ;Enable Interrupts
        WAI           ;Wait for an Interrupt

        .ORG 0C00H    ;IRQ routine, toggle A14,A11,A10,A4-A0
IRQ0:   LDS #$F000    ;Reset SP, toggles data lines
IRQ1:   LDAA $4000    ;Toggle A14
        LDX #$0020    ;Load index register
        CLRA          ;Clear A register
        STAA $00,X    ;Store A at (X+0)
        CMPA $00,X    ;Check if A matches at (X+0)
        BNE IRQ1      ;Branch if no match
        JMP SINT0     ;Jump to SINT, do more RAM checking

        .ORG 0E00H    ;NMI routine, toggle A15,A11-A9,A4-A0
NMI0:   LDS #$F000    ;Reset SP, toggles data lines
NMI1:   LDA $8000     ;Toggle A15
        CLI           ;Enable Interrupts
        LDX #$0020    ;Load index register
        CLRA          ;Clear A register
        STAA $00,X    ;Store A at (X+0)
        CMPA $00,X    ;Check if A matches at (X+0)
        BNE NMI1      ;Branch if no match
        JMP SINT0     ;Jump to SINT, do more RAM checking

        .ORG 0FF8H    ;6802 Vector Table
IRQ:    DW    IRQ0    ;0C00
SINT:   DW    SINT0   ;0A00
NMI:    DW    NMI0    ;0E00
Reset:  DW    Reset0  ;0800
        .END
 

Attachments

  • 544841 V1.0 6802.pdf
    52.8 KB · Views: 0
  • 653063 V1.0 6800.pdf
    49.2 KB · Views: 0
Does anyone (USA) have a broken z80 probe cable (dual ribbon/grounded style -- part#685461) they don't have a need for?

Broken pins on probe head, bad cable etc are all fine.

I'm looking for one for a project.

Screenshot 2025-04-28 at 18-29-17 Untitled djb_rh Flickr.png
 
Does anyone (USA) have a broken z80 probe cable (dual ribbon/grounded style -- part#685461) they don't have a need for?

Broken pins on probe head, bad cable etc are all fine.

I'm looking for one for a project.

View attachment 815848
if the pins and/or cable can be damaged do you need to limit it to a Z80 UUT? There are several other dual ribbon cables that might be easier to get a hold of.
 
I just had to check out a Joust green rom board. Slightly different process:

0xD000-0xDFFF40963006-22.10bCRC(3f1c4f89) (Fluke: 4CAA)
0xE000-0xEFFF40963006-23.11bCRC(ea48b359) (Fluke: E5D6)
0xF000-0xFFFF40963006-24.12bCRC(c710717b) (Fluke: 9996)
0x10000-0x10FFF40963006-13.1bCRC(fe41b2af) (Fluke: 3754)
0x11000-0x11FFF40963006-14.2bCRC(501c143c) (Fluke: 12DC)
0x12000-0x12FFF40963006-15.3bCRC(43f7161d) (Fluke: 9461)
0x13000-0x13FFF40963006-16.4bCRC(db5571b6) (Fluke: 9004)
0x14000-0x14FFF40963006-17.5bCRC(c686bb6b) (Fluke: 55E6)
0x15000-0x15FFF40963006-18.6bCRC(fac5f2cf) (Fluke: 0559)
0x16000-0x16FFF40963006-19.7bCRC(81418240) (Fluke: 076F)
0x17000-0x17FFF40963006-20.8bCRC(ba5359ba) (Fluke: FDE9)
0x18000-0x18FFF40963006-21.9bCRC(39643147) (Fluke: C5C5)

The first three are checked as-is as D000-FFFF is always mapped as ROM.

0000-8FFF is bank switched between ROM and Video RAM.

Per https://seanriddle.com/willhard.html 0xC900 bit 0 <= 0 switches in VRAM and <=1 switches in ROM.

So after bank switching in the ROM the last 9 are checked as start=(address - 0x10000) to start+0FFF
I came across this recently while working on my first two Joust boards. This post helped me get the fluke test to work, but it was slightly different. Sharing in the hope this helps someone else ….

I first cut the watchdog trace near 5H. If you don't, you can't change the value of C900. Then, WRITE 01 to address C900. Unexpectedly, that changed the value from F6 to F7. But, it allowed the rom test to work and with the regular addresses (10000,11000,etc). I didn't need to reference them at 0000.

This was with MPU rev D and green ROMs.

Thanks to @dorkshoei for the breadcrumb that lead me to the solution.
 
I came across this recently while working on my first two Joust boards. This post helped me get the fluke test to work, but it was slightly different. Sharing in the hope this helps someone else ….

Then, WRITE 01 to address C900. Unexpectedly, that changed the value from F6 to F7.

You're only able to write the low order bit.

I also noticed I had the incorrect SIG listed previously for 1b. I spent a while scratching my head this weekend when testing another ROM board because I thought 1b was "failing" when I'd just somehow got the wrong sig.

0x10000-0x10FFF40963006-13.1bCRC(33918f8c) (Fluke: EC81)
 
Had a friend asking me to dig into his Pole Position boards recently; I've been able to repair a few sets in the past, but with this particular set, made no progress, nor did a local "professional" apparently.

Given how nothing else uses the Z800x Pod, I'm guessing the answer is likely "no", but - anybody out there either actively working on, or considering reproducing the PCB's for the Z800x Fluke Pod perchance?
 
I just learned about the Fluke 900 and man I would love to have one of those. Seems they are a rare bird though. Do they ever pop up really? If so, what type of price range could you expect to pay?
 
I just learned about the Fluke 900 and man I would love to have one of those. Seems they are a rare bird though. Do they ever pop up really? If so, what type of price range could you expect to pay?
Do you mean Fluke 90 perhaps?

There are a few up on eBay right now, including this pair of Z80 and 8085 models. Also a couple of individual 8085 models posted. I don't see them come up all that often though, agreed. I picked up a 6809 version many years back, and it came in handy working on a few Defender MPU boards - much more portable obviously. The Quick Trace feature is very cool.
 
Ah, gotcha - I did some quick searching before, but kept finding references to the "Fluke ii900 Industrial Acoustic Imager"... I think a lot of folks would love to have a good in-circuit tester like this, but I don't know that I've seen them pop up much in general, much less this specific model. There's definitely hunger for in-circuit testing, bordering on desperation ;)
 
The Slice tool is good, but I don't think it can be used on chips that use 12v.
 
The 90 series is kind of a scaled down version of the 9010A pods all-in-one. I've got a z80 90 series actually, but have a 9010A with z80, 6502, 6800, 6802/08, and 6809 pods so don't use it much.

The 900 is different. This is it:


They show up on eBay very occasionally (though I've not seen one post Covid) and almost always without the interface buffer. Without the interface buffer it can't do in-circuit testing. With the interface buffer it takes far too long to boot up :-(

Jess Askey has good website http://apps.askey.org/fluke900. He also wrote this: https://github.com/jessaskey/fluke900link

You have to be careful as the early 900s lacked the FPGA and thus had no ability to do simulation; you always need a physical reference device.

I have a couple (including the Z-Test TM-3000 pictured below on which the Fluke 900 is based). There was supposedly a TM-3064 which supported larger devices but I've never seen one, just the service manual.

The ABI Boardmaster 4000 is a similar bit of retro kit though active in-circuit testing was one of those things that had a brief commercial window and had enough usage caveats that seemed to have limited it's adoption. The Slice tool since it's actively developed might be a better option if you intend to try in-circuit testing seriously. It's passive approach feels more like a logic analyzer with post processing like the inverse assemblers for cpus.

The 90 is totally different, though also a licensed Fluke product (vs the 9010/9100 which were in house).
 

Attachments

  • ztest.JPG
    ztest.JPG
    326.9 KB · Views: 14
Last edited:
Had a friend asking me to dig into his Pole Position boards recently; I've been able to repair a few sets in the past, but with this particular set, made no progress, nor did a local "professional" apparently.

Given how nothing else uses the Z800x Pod, I'm guessing the answer is likely "no", but - anybody out there either actively working on, or considering reproducing the PCB's for the Z800x Fluke Pod perchance?
I have a Z8000 pod, but no time to copy it. Who do I know that would be interested in this project? I'm prepared to lend the pod...

John :-#)#
 
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