So, still throwing questions at the wall here. What is the behavior of HSYNC (Disc) supposed to be when it comes to the expander board?
According to the schematics, it enters the VGG Board from the PIF pin 14 as Composite Sync
It then goes through this mess and is mixed (NAND) with the Hsync from the VGG. It's then sent out through 3J2 and NOR'ed out of 3J4 (to the Expander)
Where it then goes into this flip flop mess.
The ONLY Pin that Hsync is connected to on the Expander side is 5J11, and only that one IC - 44 (74F74).
HOWEVER
What I'm measuring right now is that if I have an expander plugged in, the HSYNC signal going to the expander ONLY is held high. What's interesting is that it has to be after that Inverter right before 3J4 right? The HSYNC going out of 3J2 is still valid and working. So, at first I suspected the Inverter (mind you, I tried this on three VGGs, and it did the same thing), but that chip on one VGG tested fine. So then I tried the 7474 on the Expander (IC54) and that tested fine out of circuit too. I also checked the harness for shorts and found none.
So. With a path that basically looks like this, how is the signal between the 74LS04 and the 74F74 getting held up?
HSYNC -> 74LS04 -> VGG 3J4-11 -> Expander 5J1-11 -> 74F74
What gives? Is this a red herring? How is this supposed to work? I don't understand how an output of a Inverter which has a pulsing input, which only goes to the input of a flip flop, is being held high when both ends and everything in the middle seems to be working.