Rygar T-1 potted module

warerat

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Hi folks,

I am trying to get an original Rygar boardset up and running but it is missing the 28-pin module that looks like it isolates the data bus during video memory access so I can't really begin to start diagnosing until I get that replaced. There doesn't seem to be much information about it out there and I'd like to recreate one.

My request goes out to those that A) have an original Rygar boardset, B) have the know-how and own a logic analyzer with sufficient I/Os and memory depth to get a good state capture to determine the behavior, C) ability to export the data to 16700 fast binary format (not a deal breaker but all I have is Agilent gear- maybe some other way I can look at the states). Essentially I'd need a capture of the CPU-side and the video side of the data bus with read/write and decoder outputs to the hybrid (if you look at the schematics you'll see what I mean).

Ideally I'd do this myself but I don't have a working reference board to know the exact behavior and I really don't want to source another board just to fix this one. I guess if you have one to sell thats OK but I'd rather not cannibalize any more of these for a seemingly simple part.

Thanks for any help!
 
Sorry for reviving this old thread.I reproduced the 'MA7053' module used on Rygar, Silkworm and Gemini Wing (and probably other Tecmo boards) and successfully tested it on my Silkworm :

 
Yes, it provides interface between main CPU data bus and memories (not the WORK RAM) on the other side.I also acts as latch.
 
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