Question with Testing TTL Chips??

msignor

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Hi,

Quick question.. I am trying to wrap my head around testing TTL chips as faulty. I am working with the 74LS138 which looks pretty common as a component.

I am following a datasheet per: http://www.datasheetcatalog.com/datasheets_pdf/7/4/L/S/74LS138.shtml

From what I can tell, pins 4,5,6 should always be Low - Low - High regarding inputs

** Is this a correct assumption that all 74LS138 Chips should follow this? Did I read this thing completely wrong?

When I compare two chips side by side on my PCB Pins 456 are -- LOW - X - High and the other is LOW - HIGH - HIGH

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Can I easily be fooled here? Is it possible that one of these 74LS138 could be getting "broken" inputs from other defective chips when the 138 is really good?

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Any tutorials out there or maybe a video explaining this a little more?
 
Those are hard chips to troubleshoot...

You have 3 inputs, 8 outputs, and 3 control lines

If you break that up into binary you get something like:

1 2 3 output
------------
0 0 0 0
0 0 1 1
0 1 0 2
0 1 1 3
1 0 0 4
1 0 1 5
1 1 0 6
1 1 1 7

But, you don't get an output without the control lines being in the right state... and those change so fast that it's very difficult to try to determine if they are all at the right state at the right time to trigger the chip.

A multi-trace scope can help with this but can be pricey... Logic analyzers can be had on the cheap but they take a bit of knowledge to run.

Easiest thing to do is to make sure the inputs look good and if they do, replace the chip.

RJ
 
A simpler method is to find a logic comparator, you give them a known good chip and it takes the inputs from the one on the board and compares the outputs of the two chips. They are fairly cheap (~$50).
 
Any suggestions on a decent one?

--

Do you have any other good resources I should read that can give me a better understanding?
 
Any suggestions on a decent one?
My EETools TopMax EPROM programmer includes a chip test function. It's handy, but of course, you have to remove the chip and insert it into the tester. Any tester is going to be like this - and given the cost of TTL chips (less than a dollar, some less than 50 cents) and the work involved desoldering them intact, if you're going to remove one you suspect is bad, it's much easier to just replace it with a new one. Clipping out the bad chip and desoldering the individual legs is much faster and it's less likely to damage the board. The tester is handy for quickly testing socketed chips, however.

Do you have any other good resources I should read that can give me a better understanding?

I think you have a grasp as to what is going on - you have inputs to a chip, the chip itself has certain characteristics listed in the logic table for the device, and you can predict what the outputs should be. Example, a 7404 is six independent inverters in one package. If the input to an inverter is high, the output should be low, and vice versa. If it's not, then something is wrong. Check the input, check the output, that gives you an idea if it's working or not. But, like Channelmanic said, some chips, like the LS138 decoder, with multiple inputs and outputs that are all related - those are going to be difficult to test in place, especially if they are changing constantly. And, just because you're getting activity on all the inputs doesn't mean that all the outputs are being addressed. Outputs 6 and 7, for instance, may never be activated under program control - but you would still see all three inputs pulsing.

-Ian
 
This is where a logic comparator comes in handy. I've never used one so I cannot comment much on it. You're supposed to be able to use it in circuit.

Omegaman has one and uses it when dealing with those pesky Omega Race boards.

RJ
 
Hi,
From what I can tell, pins 4,5,6 should always be Low - Low - High regarding inputs

** Is this a correct assumption that all 74LS138 Chips should follow this? Did I read this thing completely wrong?

When I compare two chips side by side on my PCB Pins 456 are -- LOW - X - High and the other is LOW - HIGH - HIGH

A LS138 is often used in address decoding circuits. In that capacity, it will take address lines (usually upper bits from the bus) and use them to select "turn on", or activate) different EPROMs or RAM that the CPU is trying to talk to.

Pins 4, 5 & 6 are "enable" lines for the LS138. In short, it only generates an output (that is, pulls low one of its output pins) when the enable pins are properly driven. In the case of the LS138, the enable functionality is a little complicated. In order for it to give any output, G1 (pin 6) must be high, and both G2A & G2B (pins 4 & 5) must be low. That DOESN'T mean that those pins will always be in that state; it just means that no output will be present unless they are thus. This is where a schematic is very handy--if one can be found for what you're working on, get it. Often, one or more of the enable lines will be tied directly to either +5 or GND, to hold it high or low. Sometimes all of the enable lines are held steady. Other times, they're connected to other TTL logic, or bus address or data lines. Knowing what they're connected to will help determine your expectations of what should be happening.

As others have pointed out, you can't see (without fancy equipment) exactly what is going on simultaneously on all the pins, to determine if the logic table is being violated or not. About the best you can do with a logic probe is: IF there is activity on one or more select pins, AND the enable pins are either tied to their "enable" state, or pulsing, we can fairly safely assume that there should be SOME sort of activity on the outputs. This doesn't mean ALL of the outputs will be active, but AT LEAST ONE probably should be--if there's no activity on any of the outputs (and the above conditions of the inputs are met) then I'd suspect the thing.

However, if the subject LS138 was made by Fujitsu, you might go ahead and suspect it of being a problem. Look for the letter "F" with lines above and below it.

This is a warning symbol when seen on an old TTL IC:
Ic_manuf_logo--Fujitsu_Ltd-2.gif


This is also a case where "piggybacking" a new IC on top (with just friction holding it in place) might be a good technique to try.

Are you working on a board that's totally dead? Or does it boot and not function properly? What board is it?
 
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Any suggestions on a decent one?

Keep an eye out for an HP 10529A logic comparator. I got mine for about $40 and use it all the time. You clip it onto the IC under test (in-circuit), then put a known-working IC of the same type in the comparator. The comparator LEDs will light up for any output on your test IC that does not behave the same as the corresponding output on the reference IC, which would indicate the chip is bad.

Those 8-channel PC-based USB logic analyzers are also useful for situations like this, e.g. the one linked above, or a Saleae Logic or USBee. Although unlike a logic comparator, you still have to compare what you see on the screen to what should be happening according to the datasheet/truth table.
 
TTLs are easy. Set your DMM on diode test. Put the red lead on
Vss, and use black to check every pin except Vdd. Every pin will should
show a voltage drop of .4 - .9 volts. Shorts definitely mean bad chip,
open means suspect (not all TTL have all pins connected).

Many times can be tested in circuit.

JD
 
Keep an eye out for an HP 10529A logic comparator. I got mine for about $40 and use it all the time. You clip it onto the IC under test (in-circuit), then put a known-working IC of the same type in the comparator. The comparator LEDs will light up for any output on your test IC that does not behave the same as the corresponding output on the reference IC, which would indicate the chip is bad.

Those 8-channel PC-based USB logic analyzers are also useful for situations like this, e.g. the one linked above, or a Saleae Logic or USBee. Although unlike a logic comparator, you still have to compare what you see on the screen to what should be happening according to the datasheet/truth table.

The analyzer I linked above is NOT one of the low-rate USB units. It's actually a small 16 channel logic analyzer capable of 200 mhz sampling rates. The USB-centric ones max out at 24 MHz or so, but sample straight to the PC, so they don't have buffer size limits.
 
A LS138 is often used in address decoding circuits. In that capacity, it will take address lines (usually upper bits from the bus) and use them to select "turn on", or activate) different EPROMs or RAM that the CPU is trying to talk to.

Pins 4, 5 & 6 are "enable" lines for the LS138. In short, it only generates an output (that is, pulls low one of its output pins) when the enable pins are properly driven. In the case of the LS138, the enable functionality is a little complicated. In order for it to give any output, G1 (pin 6) must be high, and both G2A & G2B (pins 4 & 5) must be low. That DOESN'T mean that those pins will always be in that state; it just means that no output will be present unless they are thus. This is where a schematic is very handy--if one can be found for what you're working on, get it. Often, one or more of the enable lines will be tied directly to either +5 or GND, to hold it high or low. Sometimes all of the enable lines are held steady. Other times, they're connected to other TTL logic, or bus address or data lines. Knowing what they're connected to will help determine your expectations of what should be happening.

As others have pointed out, you can't see (without fancy equipment) exactly what is going on simultaneously on all the pins, to determine if the logic table is being violated or not. About the best you can do with a logic probe is: IF there is activity on one or more select pins, AND the enable pins are either tied to their "enable" state, or pulsing, we can fairly safely assume that there should be SOME sort of activity on the outputs. This doesn't mean ALL of the outputs will be active, but AT LEAST ONE probably should be--if there's no activity on any of the outputs (and the above conditions of the inputs are met) then I'd suspect the thing.

However, if the subject LS138 was made by Fujitsu, you might go ahead and suspect it of being a problem. Look for the letter "F" with lines above and below it.

This is a warning symbol when seen on an old TTL IC:
Ic_manuf_logo--Fujitsu_Ltd-2.gif


This is also a case where "piggybacking" a new IC on top (with just friction holding it in place) might be a good technique to try.

Are you working on a board that's totally dead? Or does it boot and not function properly? What board is it?

The board is a TMNT Konami Board. It is literally 98% Fujitsu chips and its kind of overwhelming for my first attempt at a board repair. I didn't even know enough a week ago to troubleshoot my Centipede before I sent it to be fixed. However, I need to learn sometime.

That said, I have another thread going which outlines the issue I am having, as well as some links to youtube videos I made of what's going on. http://forums.arcade-museum.com/showthread.php?t=200996

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I am going to check out some TTL Checkers. I think I want one that actually can clip onto the chip. While I can see the point of just replacing the chip anyway.. I think if I can ebay one up for a good price it is worth it. Thanks for all the comments guys!

I was especially intrigued by the comment where I could set the DMM to diode mode and go from there. I think I may have a go at it. I really appreciate all the input so far.
 
Late to the party but.. pins 4 through 6 are just enables. As long as 4 and 5 are low and 6 is high, the 3 inputs decode to 1-of-8. If any of the 4-6 inputs are different, all of the outputs will decode to a logic '1'.

As somebody already mentioned, they are / can be used for decoding / selecting memory banks. For example, if you wanted to divide 64k into 8 banks of 8k, you could use a single '138. One (possible) configuration interfacing to a z80 would be:

pin 4 - /MREQ
pin 5 - /RD
pin 6 - /RFSH

That would select one of eight memory banks ONLY when the z80 is issuing a memory read and it's NOT a refresh cycle. The 3 inputs would map to a13-a15.

-Y
 
Can someone assist in breaking down what the 74LS151 does and how to test with the DMM probe I have?

I understand the chip is a multiplexer and can have 8 inputs to produce one output. According to the chip schematic I can tell that you have your data selectors a,b,c and I see you have the corresponding inputs. Depending on what selector is used, will determine what outputs are active. I can see from the schematic that there are some inversions happening on the output but mostly the chip is comprised of multiple AND gates, and one OR gate.

I don't understand how I can test this. Don't the inputs change at random as the system is on?
 
You like picking the ones that aren't straightforward, don't you :)

The 'chip schematics' aren't really useful. Only in the case of "basic" logic chips (such as a '04, or '08, or '32, or really most anything up to '38) are they useful. The more complicated TTLs have combinations of basic logic gates that are arcane and really only useful if you're designing the damn thing. You can't get inside the chip to test those individual gates; all you can do is probe the pins on the outside.

The function table, or truth table, or logic table, or whatever they call it in your datasheet, is what's useful in this case, along with any basic description. What the function table tells you is more or less the following:

1) it doesn't really do a damn thing unless the /G line pulled low (actually, the outputs, Y & W, are tied low & high if /G is high)

2) it does its business when /G is pulled low; at which point it essentially "connects" ONE of the 8 data input lines (D0-D7) thru to the output (Y). As a bonus, the W output is an inverted version of the output (a "complementary output"). Which data line gets "patched thru" depends on the state of the 3 select lines.

Taking all that together, I think it's reasonable to expect the following in a circuit (It would be better to consider the schematic, which shows what's connected to what... but you didn't indicate what PCB this is nor which location the subject LS151 is at.)

1) You should have +5 on the Vcc pin relative to the GND pin.
2) You should see some sort of activity (pulsing) on the /G line, OR the /G line may be tied low. If it shows steady high, then the 151 isn't being "activated".
3) You should see some sort of activity (pulsing) on at least one of the 3 select lines.
4) You should see some sort of activity (pulsing) on the output pins (Y & W).
5) W should be opposite of Y. For example, if the pulsing on Y is perhaps "high/pulsing" on the probe, then W should show "low/pulsing".

As you can see, a logic probe (in this case) isn't able to actually identify a "logic fault" in the TTL. All it can really do is help find an output or input which "stuck" high or low. Luckily, this is typically how TTLs fail.

You'll generally find stuck (or floating) inputs and outputs in bad TTLs. I doubt we'll run into a multiplexer which is malfunctioning by connecting the wrong data line to the output for a given select sequence.
 
OK, the 74LS151 is a one-of-eight selector AKA an 8 input multiplexer.

Inputs A,B & C (pins 11,10,9 on the DIP package) are used to select which of the data input lines (D0-D7) to mirror onto the Y & W outputs (Y gets the same value as on the selected D input, W gets the inverse).

The /G line (the strobe) controls whether it's on or off. If /G is high, then Y & W are fixed and have nothing to do with the D inputs. If /G is low, then Y & W mirror the selected input as described above.

So, if /G is low, A,B,C are all low, the Y = D0 and W = /D0.

Now, to really test it's operation you'd need a logic comparator or a logic analyzer. That's because to really know for sure that it's working, you need to determine if the outputs match the inputs at the correct times.

pcjohn (previous in this thread) gave a procedure for getting an IDEA of whether chip is good or bad using diode check mode on a DMM. Do note that it is POSSIBLE for this procedure to produce erroneous results when performed in-circuit because the rest of the circuit may mess with the results.

If you have a logic probe, you can probe each of the input lines (D0-7, A-C, /G) and see if they change state at all (one expects that they would move some in a functional system, unless they are unused inputs for some reason).

You could then probe the outputs (Y & W) and see if THEY move at all. If you find Y and/or W stuck at a particular level while the other is moving, you DEFINITELY have a bad chip. If you find Y and W stuck while the inputs are all moving, then it's LIKELY you have a bad chip (unfortunately you can't be 100% sure, because it could be that they SHOULD be at those levels for whatever reason. It's just not likely that they'd stay at one level for very long).
 
The '151 basically allows you to select 1 out of 8 inputs. s0-s2 (binary coded) selects which one of those inputs appears at the Z and /Z output. As long as the Enable input is low, the selected input will appear on both outputs. If Enable is high a logic '1' will appear on Z and a logic '0' on /Z.

Having both positive and negative outputs eliminates the need for an additional inverter.

-Y
 
You like picking the ones that aren't straightforward, don't you :)

I only picked this fine specimine since its one of the two you suggested to start with in the other thread I have going :)

Figured I would need to figure out how to actually test the chips you mentioned and this thread probably would be better suited so that other people can read through my pain, lol

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I really appreciate the comments, I will try and digest this stuff so when I get out of work I can get crackin!
 
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