kb2umj
New member
I'm in the heat of battle with a cocktail pacman that's dead all the way round. The monitor is dead (G07) and the board is lifeless (00B). The replacement monitor I had turns out to have issues. For now I'm working blind. I hope to have a wg4606 to use in a few days.
I've got all the schematics and guides the net can offer so I'm on my way.
The +5vdc is present and clean (o-scope) at all the chips.
The Z80 is not getting reset. Reset is high. Clock is clean and 3mhz.
I have found that the 128v, 64v and 32v signals from the 74ls161 @ 2S are trash. All other V and H signals are good.
None of the input buffers 8D, E, F and H 74ls367 chips are being selected. Pins 1 and 15 on all of them are high.
The D0 through D7 data bus lines are the thing that has me wondering if there is another issue beyond the bad TTL chip. All of the lines have for lack of a better term, a ramp type pulse. The pulse width is approx .64us wide. The pulse is positive going that ramps from 0 to 3vdc. The last .4us is flat at the 3vdc level..
My questions are: has anyone ever seen this kind signal on the databus? Could this be an effect of the screwed up V signals?
My plan is to order a few of the TTL chips that are used in more than one circuit so that I'm not paying $15 for a .55 74LS161 chip.
Sorry for the ramble.
Michael
I've got all the schematics and guides the net can offer so I'm on my way.
The +5vdc is present and clean (o-scope) at all the chips.
The Z80 is not getting reset. Reset is high. Clock is clean and 3mhz.
I have found that the 128v, 64v and 32v signals from the 74ls161 @ 2S are trash. All other V and H signals are good.
None of the input buffers 8D, E, F and H 74ls367 chips are being selected. Pins 1 and 15 on all of them are high.
The D0 through D7 data bus lines are the thing that has me wondering if there is another issue beyond the bad TTL chip. All of the lines have for lack of a better term, a ramp type pulse. The pulse width is approx .64us wide. The pulse is positive going that ramps from 0 to 3vdc. The last .4us is flat at the 3vdc level..
My questions are: has anyone ever seen this kind signal on the databus? Could this be an effect of the screwed up V signals?
My plan is to order a few of the TTL chips that are used in more than one circuit so that I'm not paying $15 for a .55 74LS161 chip.
Sorry for the ramble.
Michael
