Missile Command graphics issue

[yaryar]

Currently fighting through this graphics issue, after finally repairing a RAM error. As seen in the picture, the images are all there, but there are randomly spaced gaps in between the horizontal lines of the graphics. Also, there doesn't appear to be the scrolling message on the bottom of the screen either. The game otherwise plays and does not reboot. Digging around the schematics, the only thing I can see that would cause an issue like this would be a faulty V clock, but the frequencies on my V clocks match that of a known good board. Tested the PROM and it checks OK. Also installed the Missile Command High score save kit to bypass the ROMs (just for the hell of it) and no change. CAT FPGA says RAM and ROM are good, which is what I'd expect since the board doesn't reboot. Any ideas of what part of the hardware I should be poking around??

 

[DarrenF]

I'm no MC expert, but if the DRAM is OK, then it would seem that the microprocessor can access the DRAM fine, and the DRAM is OK. But it appears that the video hardware perhaps isn't properly addressing the DRAM.

If you've checked out the entire sync chain, I think I'd point my logic probe to the "DRAM Address Controller" section of Sheet 2 Side A of the schematics.

 

[yaryar]

I'm no MC expert, but if the DRAM is OK, then it would seem that the microprocessor can access the DRAM fine, and the DRAM is OK. But it appears that the video hardware perhaps isn't properly addressing the DRAM.

If you've checked out the entire sync chain, I think I'd point my logic probe to the "DRAM Address Controller" section of Sheet 2 Side A of the schematics.

Good call on checking out the DRAM Address Controller hardware. The faulty IC was a (Signetics brand) LS157 at location K2. Similar to hardware on other PCB's video buffers, this mux(along with a couple other LS157s) switches its inputs back and forth between loading the DRAM with the current screenshot, and pushing the data out of the DRAM onto the screen. It looked fine on the scope, but when piggybacked the screen popped back to normal.

 

[DarrenF]

Good call on checking out the DRAM Address Controller hardware. The faulty IC was a (Signetics brand) LS157 at location K2. Similar to hardware on other PCB's video buffers, this mux(along with a couple other LS157s) switches its inputs back and forth between loading the DRAM with the current screenshot, and pushing the data out of the DRAM onto the screen. It looked fine on the scope, but when piggybacked the screen popped back to normal.

Thanks for following up with the identified fault & repair.