bit_slicer
New member
This took all of yesterday and most of today:
Missile Command
* Jailbars, screen still
* Replaced all sockets
* Address space scans PASS THE PROGRAM ROMS, fails the DRAM at D(0), D(2)
* Replaced and socketed all DRAM. No change
* Found a bad inverter @ D3. Replaced. Screen flips, watchdogs now
* Checked watchdog circuit. OK
* DRAM fails intermittently across addr(2) boundaries. Suspect H3. Replaced. No change
* DRAM fails intermittently across addr(0) boundaries. Suspect F3. Replaced. No change.
* DRAM passes in best-case mode. Walked the one across all decoder boundaries. OK
* Some noise on RAS CAS lines. This bothers me. Suspect C8,B8. Replaced C8,B8. No change. Noise is better (an aside, I noticed noise in more places. I may summarily replace electrolytics on the voltage inputs.)
* Checked INT circuit. OK
* Checked Address Decoder circuit. OK (To the extent that it affects RAM/ROM!)
* Checked R/W circuit. OK
* Checked the SYNC circuit. OK
* Swapped in known-good 6502 and Pokey. No change.
* Checked the Microprocessor Data Input Interface. No MUSHROOM or MADSEL. Hmmm.
* Checked the DRAM Address Selector. No MUSHROOM or MADSEL, but logic is ok. OK
* Checked the DRAM Write Enable circuit. OK.
* Re-checked all the '244's. OK
* WTF?
At this point I'm nearly at a loss. I decided to fix another MC board to have something to compare to.
* Compared DRAM R/W cycles between two boards. Both similar in timing. OK
* Re-scanned all memory. Program ROMs and DRAMs all pass.
* Re-checked all signals at the 6502. OK
* Re-checked the Address Decoders. This time looked at ALL the outputs.
* RAM, Pokey, NIO, PROGSEL0,1,2, OUT0, COLRAM, WDOG, INTACK all OK.
* IN0, IN2 ok, IN1 is BAD! No response from N1.
IN1 reads in TEST, SLAM, fire buttons, and HDIR and VDIR. But it also reads in the status of VBLANK, which must be important for the CPU for some kind of timing info.
* Replaced LS139 @ M5. GAME COMES UP TO ATTRACT!!!
Damn obscure! So lesson learned, next time look at ALL of the decodes.
Missile Command
* Jailbars, screen still
* Replaced all sockets
* Address space scans PASS THE PROGRAM ROMS, fails the DRAM at D(0), D(2)
* Replaced and socketed all DRAM. No change
* Found a bad inverter @ D3. Replaced. Screen flips, watchdogs now
* Checked watchdog circuit. OK
* DRAM fails intermittently across addr(2) boundaries. Suspect H3. Replaced. No change
* DRAM fails intermittently across addr(0) boundaries. Suspect F3. Replaced. No change.
* DRAM passes in best-case mode. Walked the one across all decoder boundaries. OK
* Some noise on RAS CAS lines. This bothers me. Suspect C8,B8. Replaced C8,B8. No change. Noise is better (an aside, I noticed noise in more places. I may summarily replace electrolytics on the voltage inputs.)
* Checked INT circuit. OK
* Checked Address Decoder circuit. OK (To the extent that it affects RAM/ROM!)
* Checked R/W circuit. OK
* Checked the SYNC circuit. OK
* Swapped in known-good 6502 and Pokey. No change.
* Checked the Microprocessor Data Input Interface. No MUSHROOM or MADSEL. Hmmm.
* Checked the DRAM Address Selector. No MUSHROOM or MADSEL, but logic is ok. OK
* Checked the DRAM Write Enable circuit. OK.
* Re-checked all the '244's. OK
* WTF?
At this point I'm nearly at a loss. I decided to fix another MC board to have something to compare to.
* Compared DRAM R/W cycles between two boards. Both similar in timing. OK
* Re-scanned all memory. Program ROMs and DRAMs all pass.
* Re-checked all signals at the 6502. OK
* Re-checked the Address Decoders. This time looked at ALL the outputs.
* RAM, Pokey, NIO, PROGSEL0,1,2, OUT0, COLRAM, WDOG, INTACK all OK.
* IN0, IN2 ok, IN1 is BAD! No response from N1.
IN1 reads in TEST, SLAM, fire buttons, and HDIR and VDIR. But it also reads in the status of VBLANK, which must be important for the CPU for some kind of timing info.
* Replaced LS139 @ M5. GAME COMES UP TO ATTRACT!!!
Damn obscure! So lesson learned, next time look at ALL of the decodes.
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