My Defender (later system board with CPU @ 2I) unexpectedly froze after being powered on for several hours last week. The video displayed a frozen attract mode screen (and it would not respond to any buttons). After I power cycled the cabinet, it came up with a blank screen-- no sound or diagnostics. Checked the power supply and have 5.15v at the supply, 4.85v at the chips. Have converted to 4164s so +12v & -5v are not needed (and +12 looks fine at the power supply as well).
I located the "CPU Board Logic Probe Troubleshooting Guide" and started working through it. The first failure case was chip 5P is not pulsing on pin 6. According to the flowchart, this indicates a problem with either 5P or 3D (I have not lifted 5P-6 to isolate yet). I looked at the Defender "Theory of Operation" manual to better understand what this failure might mean and that is when confusion started.
Am I blind, or does the Theory of Operation manual have major accuracy problems? I seem to be finding lots of errors. For example, figure 3-7 Video RAM Controls labels both a 7410 and 7432 as 5P, shows pin 1 of 7432 4R as an output (its actually an input on the datasheet), duplicates the same gate and pins in two different places (there are two different 4R gates using pins 4,5,6 though one has mixed up pins), etc.
Has anyone come up with annotated list of corrections for this document or can someone point me to a correct schematic? Given these old schematics were largely manually created, a few errors are expected, but this is way beyond what I have seen before. Am currently spending more time trying to decode the schematic snippits in the Operation manual than actually troubleshooting the board.
Thanks!
I located the "CPU Board Logic Probe Troubleshooting Guide" and started working through it. The first failure case was chip 5P is not pulsing on pin 6. According to the flowchart, this indicates a problem with either 5P or 3D (I have not lifted 5P-6 to isolate yet). I looked at the Defender "Theory of Operation" manual to better understand what this failure might mean and that is when confusion started.
Am I blind, or does the Theory of Operation manual have major accuracy problems? I seem to be finding lots of errors. For example, figure 3-7 Video RAM Controls labels both a 7410 and 7432 as 5P, shows pin 1 of 7432 4R as an output (its actually an input on the datasheet), duplicates the same gate and pins in two different places (there are two different 4R gates using pins 4,5,6 though one has mixed up pins), etc.
Has anyone come up with annotated list of corrections for this document or can someone point me to a correct schematic? Given these old schematics were largely manually created, a few errors are expected, but this is way beyond what I have seen before. Am currently spending more time trying to decode the schematic snippits in the Operation manual than actually troubleshooting the board.
Thanks!
