Bubble Bobble / Z80 question

tendril

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Short question - if a Z80 is held in reset state (reset pin low) should the MREQ line be low, high or floating? I found some docs that say it should be floating, but on this board MREQ is low.

Long details - I have a super ratty beat up Bubble Bobble bootleg. The design of BB is there are two CPU's - the second is held in reset from boot until the main CPU enables it. There is a shared RAM chip and a PAL controls access to it by setting WAIT on the main CPU if the sub CPU is requesting it. So this particular board seems to have a deadlock from boot - the main program starts executing, tries to write to the main ram (a stack push) then gets told to WAIT by the PAL. And the reason is MREQ is low on the sub CPU even though the sub CPU is held in reset.

I double checked with MAME and the sub CPU isn't turned on until long after this (and I can see exactly where the main CPU has stopped by reading the address pins which are all held in WAIT state).

So I desoldered the PAL so I can float the MREQ input to the PAL and then the CPU runs, and indeed turns on the second CPU - which later pulses MREQ (so it's not permanently stuck low). Of course the programs presumably crash due to RAM contention.

So I guess the sub Z80 might be bad..? Any thoughts before I have to desolder it?

:)
 
From various Z80 literature:

"During reset time, the address and data bus go to a high impedance state and all control output signals go to the inactive state".

This would suggest that /MREQ should be high.
 
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